The present invention relates to a bipolar transistor, and more particularly to a heterojunction bipolar transistor using SiGe for its base region, and a fabrication method for the same.
In a heterojunction bipolar transistor (HBT), by forming the base region using SiGe mixed crystal that is narrower in band gap than the emitter region, it is possible to suppress holes from entering the emitter region from the base region even if the base region is doped with a highly-concentrated impurity. Therefore, the base resistance can be reduced while the current amplification (hFE) is secured, and thus the HBT can operate at higher speed than a normal Si bipolar transistor.
Such a SiGe-HBT also has an effect that the carrier mobility increases because of lattice distortion existing in a SiGe layer that is to be the base region. This can shorten the travel time of carriers through the base and thus permits further higher-speed operation (see Japanese National Phase PCT Laid-Open Publication No. 02-504205).
Although only an intrinsic base region located immediately below the emitter region is necessary for a HBT to perform transistor operation, an external base region must be provided in adjacent to the intrinsic base region to secure contact with a base electrode. An overlap portion of the external base region and the collector region however forms an external base-collector parasitic capacitance, and with such a parasitic capacitance, sufficient speedup fails even if the area of the emitter region is reduced.
A SiGe-HBT using polysilicon as extraction electrodes shown in FIG. 6 may well be said to have a transistor structure suitable for speedup because it is easy to reduce the parasitic capacitance by miniaturization (see Japanese Laid-Open Patent Publication No. 2001-332563, for example).
Referring to FIG. 6, on a collector region 101 formed inside a Si substrate, formed is an intrinsic base region 103 made of SiGe mixed crystal doped with boron (B) as a p-type impurity grown by selective epitaxy.
An emitter region 106 is formed inside the intrinsic base region 103, and an emitter extraction electrode (emitter polysilicon electrode) 108 doped with phosphorus (P) as an n-type impurity is formed for connecting the emitter region 106 with a metal interconnection 111. The emitter region 106 is formed by first forming the emitter polysilicon electrode 108 and heat-treating the emitter polysilicon electrode 108 to allow phosphorus therein to diffuse into the base region 103. If the emitter region 106 is formed by ion implantation, boron may diffuse at an accelerated speed due to release of interstitial silicon during activation annealing, causing a problem of degrading a high-frequency characteristic. By using the doped emitter polysilicon electrode as described above, such accelerated-speed diffusion of boron can be prevented.
An external base region 104 and a base extraction electrode 105, which are formed simultaneously with the intrinsic base region 103, are doped with highly-concentrated boron by ion implantation in a self-alignment manner using the emitter polysilicon electrode 108 as a mask. With this doping, the distance of the intrinsic base region 103 between the emitter region 106 and the external base region 104 can be shortened to thereby reduce the base resistance. Also, because the base extraction electrode (base polysilicon electrode) 105 is formed on an isolation region 102, the parasitic capacitance between the external base region and the collector can be reduced.
In the transistor structure shown in FIG. 6, to electrically isolate the emitter polysilicon electrode 108 from the base polysilicon electrode 105, an insulation film 107 such as an oxide film and a nitride film is formed between the emitter polysilicon electrode 108 and the base polysilicon electrode 105. Also, to reduce the contact resistance against the metal interconnection 111, a silicide film 109 such as cobalt (Co) silicide is formed on the surfaces of the emitter polysilicon electrode 108 and the base polysilicon electrode 105, and is connected with the metal interconnection 111 via a contact hole 110 filled with tungsten (W) and the like.
As described above, in the SiGe-HBT using polysilicon as extraction electrodes, the parasitic capacitance/resistance can be easily reduced by miniaturization, and thus such a SiGe-HBT can well be said to have a transistor structure suitable for speedup. However, if the concentration of boron ion-implanted in the external base region 104 is 5E19cm−3 or higher, for example, boron will diffuse at an accelerated speed due to release of interstitial silicon during activation annealing, causing problems of reduction in hFE and early voltage and degradation in high-frequency characteristic.
A raised base structure shown in FIG. 7 provides an effective means for preventing the accelerated-speed diffusion of boron in an external base region 104 (see Japanese Laid-Open Patent Publication No. 2002-313798, for example).
As shown in FIG. 7, a polysilicon film 107 doped with boron as a p-type impurity is formed on the external base region 104 that is a SiGe epitaxial layer formed on the collector region 101 and an isolation region 102 (the portion of the region 104 on the isolation region 102 is a polysilicon layer). Boron diffuses from the doped polysilicon film 107 into the external base region 104 to give the highly-concentrated external base region 104. In this way, by using the doped polysilicon film 107 as a diffusion source for the external base region 104, the accelerated-speed diffusion of boron in the external base region 104 is prevented.